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Commit 1cf2ce41 authored by Miguel Angel Reina Ortega's avatar Miguel Angel Reina Ortega
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Added new control files for each product profile in TS-0025 


Signed-off-by: Miguel Angel Reina Ortega's avatarMiguel Angel Reina Ortega <miguelangel.reinaortega@etsi.org>
parent 5ee6d8e0
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OneM2M_TestControl_ADN_profile_3.ttcn 0 → 100644
+ 36
− 0
View file @ 1cf2ce41
/**
* Copyright Notification
* No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
* The copyright and the foregoing restriction extend to reproduction in all media.
* © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
* All rights reserved.
*
* @author ETSI
* @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
* $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
* @desc Test control module for oneM2M
*
*/
module OneM2M_TestControl_ADN_profile_3 {
import from OneM2M_Testcases_CSE all;
control {
//AE_GEN_00001
//AE_GEN_00002
//AE_REG_00002
//AE_DMR_00001
//AE_DMR_00002
}
} // end of module OneM2M_TestControl_ADN_profile_3
OneM2M_TestControl_ADN_profile_4.ttcn 0 → 100644
+ 37
− 0
View file @ 1cf2ce41
/**
* Copyright Notification
* No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
* The copyright and the foregoing restriction extend to reproduction in all media.
* © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
* All rights reserved.
*
* @author ETSI
* @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
* $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
* @desc Test control module for oneM2M
*
*/
module OneM2M_TestControl_ADN_profile_4 {
import from OneM2M_Testcases_CSE all;
control {
//AE_GEN_00001
//AE_GEN_00002
//AE_REG_00001
//AE_REG_00002
//AE_DMR_00001
//AE_DMR_00002
}
} // end of module OneM2M_TestControl_ADN_profile_4
OneM2M_TestControl_Constrained_actuator_as_ADN.ttcn 0 → 100644
+ 35
− 0
View file @ 1cf2ce41
/**
* Copyright Notification
* No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
* The copyright and the foregoing restriction extend to reproduction in all media.
* © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
* All rights reserved.
*
* @author ETSI
* @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
* $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
* @desc Test control module for oneM2M
*
*/
module OneM2M_TestControl_Constrained_actuator_as_ADN {
import from OneM2M_Testcases_CSE all;
control {
//AE_GEN_00001
//AE_GEN_00002
//AE_REG_00002
//AE_SUB_00001
}
} // end of module OneM2M_TestControl_Constrained_actuator_as_ADN
OneM2M_TestControl_Constrained_sensor_as_ADN.ttcn 0 → 100644
+ 31
− 0
View file @ 1cf2ce41
/**
* Copyright Notification
* No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
* The copyright and the foregoing restriction extend to reproduction in all media.
* © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
* All rights reserved.
*
* @author ETSI
* @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
* $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
* @desc Test control module for oneM2M
*
*/
module OneM2M_TestControl_Constrained_sensor_as_ADN {
import from OneM2M_Testcases_CSE all;
control {
//AE_GEN_00001
//AE_GEN_00002
//AE_DMR_00002
}
} // end of module OneM2M_TestControl_Constrained_sensor_as_ADN
OneM2M_TestControl.ttcn → OneM2M_TestControl_IN_profile.ttcn
+ 269
− 359
View file @ 1cf2ce41
/** /**
* Copyright Notification * Copyright Notification
* No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission. * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
* The copyright and the foregoing restriction extend to reproduction in all media. * The copyright and the foregoing restriction extend to reproduction in all media.
* © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC). * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
* All rights reserved. * All rights reserved.
* *
* @author ETSI * @author ETSI
* @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
* $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
* @desc Test control module for oneM2M * @desc Test control module for oneM2M
* *
*/ */
module OneM2M_TestControl { module OneM2M_TestControl_IN_profile {
import from OneM2M_Testcases_CSE all; import from OneM2M_Testcases_CSE all;
control { control {
execute(TC_CSE_GEN_CRE_001_CSR());
execute(TC_CSE_GEN_CRE_001_SPR()); //CE_GEN_00001
execute(TC_CSE_GEN_CRE_001_ABS()); execute(TC_CSE_GEN_CRE_001_CSR());
execute(TC_CSE_GEN_RET_001_CSR()); execute(TC_CSE_GEN_CRE_001_SPR());
execute(TC_CSE_GEN_RET_001_SPR()); execute(TC_CSE_GEN_CRE_001_ABS());
execute(TC_CSE_GEN_RET_001_ABS()); execute(TC_CSE_GEN_RET_001_CSR());
execute(TC_CSE_GEN_UPD_001_CSR()); execute(TC_CSE_GEN_RET_001_SPR());
execute(TC_CSE_GEN_UPD_001_SPR()); execute(TC_CSE_GEN_RET_001_ABS());
execute(TC_CSE_GEN_UPD_001_ABS()); execute(TC_CSE_GEN_UPD_001_CSR());
execute(TC_CSE_GEN_DEL_001_CSR()); execute(TC_CSE_GEN_UPD_001_SPR());
execute(TC_CSE_GEN_DEL_001_SPR()); execute(TC_CSE_GEN_UPD_001_ABS());
execute(TC_CSE_GEN_DEL_001_ABS()); execute(TC_CSE_GEN_DEL_001_CSR());
execute(TC_CSE_REG_CRE_001()); execute(TC_CSE_GEN_DEL_001_SPR());
execute(TC_CSE_REG_CRE_002()); execute(TC_CSE_GEN_DEL_001_ABS());
execute(TC_CSE_REG_CRE_004());
execute(TC_CSE_REG_CRE_005()); //CE_GEN_00002
execute(TC_CSE_REG_CRE_008());
execute(TC_CSE_REG_CRE_009()); //CE_REG_00001
execute(TC_CSE_REG_CRE_010()); execute(TC_CSE_REG_CRE_001());
execute(TC_CSE_REG_CRE_016_LBL()); execute(TC_CSE_REG_CRE_002());
execute(TC_CSE_REG_CRE_016_CST()); execute(TC_CSE_REG_CRE_004());
execute(TC_CSE_REG_CRE_016_POA()); execute(TC_CSE_REG_CRE_005());
execute(TC_CSE_REG_CRE_016_NL()); execute(TC_CSE_REG_CRE_008());
execute(TC_CSE_REG_CRE_019()); execute(TC_CSE_REG_CRE_009());
execute(TC_CSE_REG_CRE_022()); execute(TC_CSE_REG_CRE_010());
execute(TC_CSE_REG_CRE_023()); execute(TC_CSE_REG_CRE_016_LBL());
execute(TC_CSE_REG_CRE_025()); execute(TC_CSE_REG_CRE_016_CST());
execute(TC_CSE_REG_CRE_028()); execute(TC_CSE_REG_CRE_016_POA());
execute(TC_CSE_REG_CRE_029()); execute(TC_CSE_REG_CRE_016_NL());
execute(TC_CSE_REG_RET_001()); execute(TC_CSE_REG_CRE_019());
execute(TC_CSE_REG_RET_005()); execute(TC_CSE_REG_CRE_022());
execute(TC_CSE_REG_RET_008()); execute(TC_CSE_REG_CRE_023());
execute(TC_CSE_REG_UPD_001()); execute(TC_CSE_REG_CRE_025());
execute(TC_CSE_REG_DEL_001()); execute(TC_CSE_REG_CRE_028());
execute(TC_CSE_REG_CRE_029());
execute(TC_CSE_DMR_CRE_001_CNT_CB()); execute(TC_CSE_REG_RET_001());
execute(TC_CSE_DMR_CRE_001_CNT_AE()); execute(TC_CSE_REG_RET_005());
execute(TC_CSE_DMR_CRE_001_CNT_CNT()); execute(TC_CSE_REG_RET_008());
execute(TC_CSE_DMR_CRE_001_GRP_CB()); execute(TC_CSE_REG_UPD_001());
execute(TC_CSE_DMR_CRE_001_GRP_AE()); execute(TC_CSE_REG_DEL_001());
execute(TC_CSE_DMR_CRE_001_ACP_CB());
execute(TC_CSE_DMR_CRE_001_ACP_AE()); //CE_REG_00002
execute(TC_CSE_DMR_CRE_001_SCH_CB());
execute(TC_CSE_DMR_CRE_001_SCH_AE()); //CE_REG_00004
execute(TC_CSE_DMR_CRE_001_SCH_SUB());
execute(TC_CSE_DMR_CRE_001_PCH_AE()); //CE_DMR_00001
execute(TC_CSE_DMR_CRE_001_SUB_CB()); execute(TC_CSE_DMR_CRE_001_CNT_CB());
execute(TC_CSE_DMR_CRE_001_SUB_AE()); execute(TC_CSE_DMR_CRE_001_CNT_AE());
execute(TC_CSE_DMR_CRE_001_SUB_CNT()); execute(TC_CSE_DMR_CRE_001_CNT_CNT());
execute(TC_CSE_DMR_CRE_001_SUB_ACP()); execute(TC_CSE_DMR_CRE_001_GRP_CB());
execute(TC_CSE_DMR_CRE_001_SUB_SCH()); execute(TC_CSE_DMR_CRE_001_GRP_AE());
execute(TC_CSE_DMR_CRE_001_SUB_GRP()); execute(TC_CSE_DMR_CRE_001_ACP_CB());
execute(TC_CSE_DMR_CRE_001_NOD_CB()); execute(TC_CSE_DMR_CRE_001_ACP_AE());
execute(TC_CSE_DMR_CRE_001_MGC_CB()); execute(TC_CSE_DMR_CRE_001_SCH_CB());
execute(TC_CSE_DMR_CRE_001_LCP_CB()); execute(TC_CSE_DMR_CRE_001_SCH_AE());
execute(TC_CSE_DMR_CRE_001_STCG_CB()); execute(TC_CSE_DMR_CRE_001_SCH_SUB());
execute(TC_CSE_DMR_CRE_001_STCL_CB()); execute(TC_CSE_DMR_CRE_001_PCH_AE());
execute(TC_CSE_DMR_CRE_001_MSSP_CB()); execute(TC_CSE_DMR_CRE_001_SUB_CB());
execute(TC_CSE_DMR_CRE_001_ASAR_CB()); execute(TC_CSE_DMR_CRE_001_SUB_AE());
execute(TC_CSE_DMR_CRE_001_CIN_CNT()); execute(TC_CSE_DMR_CRE_001_SUB_CNT());
execute(TC_CSE_DMR_CRE_002_CNT()); execute(TC_CSE_DMR_CRE_001_SUB_ACP());
execute(TC_CSE_DMR_CRE_002_GRP()); execute(TC_CSE_DMR_CRE_001_SUB_SCH());
execute(TC_CSE_DMR_CRE_002_ACP()); execute(TC_CSE_DMR_CRE_001_SUB_GRP());
execute(TC_CSE_DMR_CRE_002_SCH()); execute(TC_CSE_DMR_CRE_001_NOD_CB());
execute(TC_CSE_DMR_CRE_002_PCH()); execute(TC_CSE_DMR_CRE_001_MGC_CB());
execute(TC_CSE_DMR_CRE_002_SUB()); execute(TC_CSE_DMR_CRE_001_LCP_CB());
execute(TC_CSE_DMR_CRE_003_CNT()); execute(TC_CSE_DMR_CRE_001_STCG_CB());
execute(TC_CSE_DMR_CRE_003_GRP()); execute(TC_CSE_DMR_CRE_001_STCL_CB());
execute(TC_CSE_DMR_CRE_003_ACP()); execute(TC_CSE_DMR_CRE_001_MSSP_CB());
execute(TC_CSE_DMR_CRE_003_SCH()); execute(TC_CSE_DMR_CRE_001_ASAR_CB());
execute(TC_CSE_DMR_CRE_003_PCH()); execute(TC_CSE_DMR_CRE_001_CIN_CNT());
execute(TC_CSE_DMR_CRE_003_SUB()); execute(TC_CSE_DMR_CRE_002_CNT());
execute(TC_CSE_DMR_CRE_004_CNT()); execute(TC_CSE_DMR_CRE_002_GRP());
execute(TC_CSE_DMR_CRE_004_GRP()); execute(TC_CSE_DMR_CRE_002_ACP());
execute(TC_CSE_DMR_CRE_004_ACP()); execute(TC_CSE_DMR_CRE_002_SCH());
execute(TC_CSE_DMR_CRE_004_SCH()); execute(TC_CSE_DMR_CRE_002_PCH());
execute(TC_CSE_DMR_CRE_004_PCH()); execute(TC_CSE_DMR_CRE_002_SUB());
execute(TC_CSE_DMR_CRE_004_SUB()); execute(TC_CSE_DMR_CRE_003_CNT());
execute(TC_CSE_DMR_RET_001_CNT()); execute(TC_CSE_DMR_CRE_003_GRP());
execute(TC_CSE_DMR_RET_001_GRP()); execute(TC_CSE_DMR_CRE_003_ACP());
execute(TC_CSE_DMR_RET_001_ACP()); execute(TC_CSE_DMR_CRE_003_SCH());
execute(TC_CSE_DMR_RET_001_SCH()); execute(TC_CSE_DMR_CRE_003_PCH());
execute(TC_CSE_DMR_RET_001_PCH()); execute(TC_CSE_DMR_CRE_003_SUB());
execute(TC_CSE_DMR_RET_001_SUB()); execute(TC_CSE_DMR_CRE_004_CNT());
execute(TC_CSE_DMR_RET_001_CIN()); execute(TC_CSE_DMR_CRE_004_GRP());
execute(TC_CSE_DMR_RET_002()); execute(TC_CSE_DMR_CRE_004_ACP());
execute(TC_CSE_DMR_RET_003_CNT()); execute(TC_CSE_DMR_CRE_004_SCH());
execute(TC_CSE_DMR_RET_003_GRP()); execute(TC_CSE_DMR_CRE_004_PCH());
execute(TC_CSE_DMR_RET_003_ACP()); execute(TC_CSE_DMR_CRE_004_SUB());
execute(TC_CSE_DMR_RET_003_SCH()); execute(TC_CSE_DMR_RET_001_CNT());
execute(TC_CSE_DMR_RET_003_PCH()); execute(TC_CSE_DMR_RET_001_GRP());
execute(TC_CSE_DMR_RET_003_SUB()); execute(TC_CSE_DMR_RET_001_ACP());
execute(TC_CSE_DMR_RET_004_CNT()); execute(TC_CSE_DMR_RET_001_SCH());
execute(TC_CSE_DMR_RET_004_GRP()); execute(TC_CSE_DMR_RET_001_PCH());
execute(TC_CSE_DMR_RET_004_ACP()); execute(TC_CSE_DMR_RET_001_SUB());
execute(TC_CSE_DMR_RET_004_SCH()); execute(TC_CSE_DMR_RET_001_CIN());
execute(TC_CSE_DMR_RET_004_PCH()); execute(TC_CSE_DMR_RET_002());
execute(TC_CSE_DMR_RET_004_SUB()); execute(TC_CSE_DMR_RET_003_CNT());
execute(TC_CSE_DMR_RET_005_CNT()); execute(TC_CSE_DMR_RET_003_GRP());
execute(TC_CSE_DMR_RET_005_GRP()); execute(TC_CSE_DMR_RET_003_ACP());
execute(TC_CSE_DMR_RET_005_ACP()); execute(TC_CSE_DMR_RET_003_SCH());
execute(TC_CSE_DMR_RET_005_SCH()); execute(TC_CSE_DMR_RET_003_PCH());
execute(TC_CSE_DMR_RET_005_PCH()); execute(TC_CSE_DMR_RET_003_SUB());
execute(TC_CSE_DMR_RET_005_SUB()); execute(TC_CSE_DMR_RET_004_CNT());
execute(TC_CSE_DMR_RET_006_CNT()); execute(TC_CSE_DMR_RET_004_GRP());
execute(TC_CSE_DMR_RET_006_GRP()); execute(TC_CSE_DMR_RET_004_ACP());
execute(TC_CSE_DMR_RET_006_ACP()); execute(TC_CSE_DMR_RET_004_SCH());
execute(TC_CSE_DMR_RET_006_SCH()); execute(TC_CSE_DMR_RET_004_PCH());
execute(TC_CSE_DMR_RET_006_PCH()); execute(TC_CSE_DMR_RET_004_SUB());
execute(TC_CSE_DMR_RET_006_SUB()); execute(TC_CSE_DMR_RET_005_CNT());
execute(TC_CSE_DMR_RET_007_CNT_LBL()); execute(TC_CSE_DMR_RET_005_GRP());
execute(TC_CSE_DMR_RET_007_GRP_LBL()); execute(TC_CSE_DMR_RET_005_ACP());
execute(TC_CSE_DMR_RET_007_ACP_LBL()); execute(TC_CSE_DMR_RET_005_SCH());
execute(TC_CSE_DMR_RET_007_SCH_LBL()); execute(TC_CSE_DMR_RET_005_PCH());
execute(TC_CSE_DMR_RET_007_PCH_LBL()); execute(TC_CSE_DMR_RET_005_SUB());
execute(TC_CSE_DMR_RET_007_SUB_LBL()); execute(TC_CSE_DMR_RET_006_CNT());
execute(TC_CSE_DMR_RET_008_CNT_AT()); execute(TC_CSE_DMR_RET_006_GRP());
execute(TC_CSE_DMR_RET_008_GRP_AT()); execute(TC_CSE_DMR_RET_006_ACP());
execute(TC_CSE_DMR_RET_008_ACP_AT()); execute(TC_CSE_DMR_RET_006_SCH());
execute(TC_CSE_DMR_RET_008_SCH_AT()); execute(TC_CSE_DMR_RET_006_PCH());
execute(TC_CSE_DMR_RET_008_PCH_AT()); execute(TC_CSE_DMR_RET_006_SUB());
execute(TC_CSE_DMR_RET_008_SUB_AT()); execute(TC_CSE_DMR_RET_007_CNT_LBL());
execute(TC_CSE_DMR_RET_020_RCN_0()); execute(TC_CSE_DMR_RET_007_GRP_LBL());
execute(TC_CSE_DMR_RET_020_RCN_2()); execute(TC_CSE_DMR_RET_007_ACP_LBL());
execute(TC_CSE_DMR_RET_020_RCN_3()); execute(TC_CSE_DMR_RET_007_SCH_LBL());
execute(TC_CSE_DMR_RET_021_CNT()); execute(TC_CSE_DMR_RET_007_PCH_LBL());
execute(TC_CSE_DMR_RET_021_GRP()); execute(TC_CSE_DMR_RET_007_SUB_LBL());
execute(TC_CSE_DMR_RET_021_ACP()); execute(TC_CSE_DMR_RET_008_CNT_AT());
execute(TC_CSE_DMR_RET_021_SCH()); execute(TC_CSE_DMR_RET_008_GRP_AT());
execute(TC_CSE_DMR_RET_021_PCH()); execute(TC_CSE_DMR_RET_008_ACP_AT());
execute(TC_CSE_DMR_RET_021_SUB()); execute(TC_CSE_DMR_RET_008_SCH_AT());
execute(TC_CSE_DMR_RET_022_CNT()); execute(TC_CSE_DMR_RET_008_PCH_AT());
execute(TC_CSE_DMR_RET_022_GRP()); execute(TC_CSE_DMR_RET_008_SUB_AT());
execute(TC_CSE_DMR_RET_022_ACP()); execute(TC_CSE_DMR_RET_020_RCN_0());
execute(TC_CSE_DMR_RET_022_SCH()); execute(TC_CSE_DMR_RET_020_RCN_2());
execute(TC_CSE_DMR_RET_022_PCH()); execute(TC_CSE_DMR_RET_020_RCN_3());
execute(TC_CSE_DMR_RET_022_SUB()); execute(TC_CSE_DMR_RET_021_CNT());
execute(TC_CSE_DMR_RET_023_CNT()); execute(TC_CSE_DMR_RET_021_GRP());
execute(TC_CSE_DMR_RET_023_GRP()); execute(TC_CSE_DMR_RET_021_ACP());
execute(TC_CSE_DMR_RET_023_ACP()); execute(TC_CSE_DMR_RET_021_SCH());
execute(TC_CSE_DMR_RET_023_SCH()); execute(TC_CSE_DMR_RET_021_PCH());
execute(TC_CSE_DMR_RET_023_PCH()); execute(TC_CSE_DMR_RET_021_SUB());
execute(TC_CSE_DMR_RET_023_SUB()); execute(TC_CSE_DMR_RET_022_CNT());
execute(TC_CSE_DMR_RET_024_CNT()); execute(TC_CSE_DMR_RET_022_GRP());
execute(TC_CSE_DMR_RET_024_GRP()); execute(TC_CSE_DMR_RET_022_ACP());
execute(TC_CSE_DMR_RET_024_ACP()); execute(TC_CSE_DMR_RET_022_SCH());
execute(TC_CSE_DMR_RET_024_SCH()); execute(TC_CSE_DMR_RET_022_PCH());
execute(TC_CSE_DMR_RET_024_PCH()); execute(TC_CSE_DMR_RET_022_SUB());
execute(TC_CSE_DMR_RET_024_SUB()); execute(TC_CSE_DMR_RET_023_CNT());
execute(TC_CSE_DMR_UPD_001_CNT_LBL()); execute(TC_CSE_DMR_RET_023_GRP());
execute(TC_CSE_DMR_UPD_001_GRP_LBL()); execute(TC_CSE_DMR_RET_023_ACP());
execute(TC_CSE_DMR_UPD_001_ACP_LBL()); execute(TC_CSE_DMR_RET_023_SCH());
execute(TC_CSE_DMR_UPD_001_SCH_LBL()); execute(TC_CSE_DMR_RET_023_PCH());
execute(TC_CSE_DMR_UPD_001_PCH_LBL()); execute(TC_CSE_DMR_RET_023_SUB());
execute(TC_CSE_DMR_UPD_001_SUB_LBL()); execute(TC_CSE_DMR_RET_024_CNT());
execute(TC_CSE_DMR_UPD_002_CNT_LBL()); execute(TC_CSE_DMR_RET_024_GRP());
execute(TC_CSE_DMR_UPD_002_GRP_LBL()); execute(TC_CSE_DMR_RET_024_ACP());
execute(TC_CSE_DMR_UPD_002_ACP_LBL()); execute(TC_CSE_DMR_RET_024_SCH());
execute(TC_CSE_DMR_UPD_002_SCH_LBL()); execute(TC_CSE_DMR_RET_024_PCH());
execute(TC_CSE_DMR_UPD_002_PCH_LBL()); execute(TC_CSE_DMR_RET_024_SUB());
execute(TC_CSE_DMR_UPD_002_SUB_LBL()); execute(TC_CSE_DMR_UPD_001_CNT_LBL());
execute(TC_CSE_DMR_UPD_003_CNT_LBL()); execute(TC_CSE_DMR_UPD_001_GRP_LBL());
execute(TC_CSE_DMR_UPD_003_GRP_LBL()); execute(TC_CSE_DMR_UPD_001_ACP_LBL());
execute(TC_CSE_DMR_UPD_003_ACP_LBL()); execute(TC_CSE_DMR_UPD_001_SCH_LBL());
execute(TC_CSE_DMR_UPD_003_SCH_LBL()); execute(TC_CSE_DMR_UPD_001_PCH_LBL());
execute(TC_CSE_DMR_UPD_003_PCH_LBL()); execute(TC_CSE_DMR_UPD_001_SUB_LBL());
execute(TC_CSE_DMR_UPD_003_SUB_LBL()); execute(TC_CSE_DMR_UPD_002_CNT_LBL());
execute(TC_CSE_DMR_UPD_004_CNT_ET_MNI_LBL()); execute(TC_CSE_DMR_UPD_002_GRP_LBL());
execute(TC_CSE_DMR_UPD_004_GRP_ET_GN_LBL()); execute(TC_CSE_DMR_UPD_002_ACP_LBL());
execute(TC_CSE_DMR_UPD_004_ACP_PV_AT_LBL()); execute(TC_CSE_DMR_UPD_002_SCH_LBL());
execute(TC_CSE_DMR_UPD_004_SCH_SE_AT_LBL()); execute(TC_CSE_DMR_UPD_002_PCH_LBL());
execute(TC_CSE_DMR_UPD_004_PCH_LBL_ACP_LBL()); execute(TC_CSE_DMR_UPD_002_SUB_LBL());
execute(TC_CSE_DMR_UPD_004_SUB_ET_LBL_EXC()); execute(TC_CSE_DMR_UPD_003_CNT_LBL());
execute(TC_CSE_DMR_UPD_005_CNT_EXC()); execute(TC_CSE_DMR_UPD_003_GRP_LBL());
execute(TC_CSE_DMR_UPD_005_GRP_EXC()); execute(TC_CSE_DMR_UPD_003_ACP_LBL());
execute(TC_CSE_DMR_UPD_005_ACP_EXC()); execute(TC_CSE_DMR_UPD_003_SCH_LBL());
execute(TC_CSE_DMR_UPD_005_SCH_EXC()); execute(TC_CSE_DMR_UPD_003_PCH_LBL());
execute(TC_CSE_DMR_UPD_005_PCH_EXC()); execute(TC_CSE_DMR_UPD_003_SUB_LBL());
execute(TC_CSE_DMR_UPD_005_SUB_MNI()); execute(TC_CSE_DMR_UPD_004_CNT_ET_MNI_LBL());
execute(TC_CSE_DMR_UPD_006_CNT_LBL()); execute(TC_CSE_DMR_UPD_004_GRP_ET_GN_LBL());
execute(TC_CSE_DMR_UPD_006_GRP_LBL()); execute(TC_CSE_DMR_UPD_004_ACP_PV_AT_LBL());
execute(TC_CSE_DMR_UPD_006_ACP_LBL()); execute(TC_CSE_DMR_UPD_004_SCH_SE_AT_LBL());
execute(TC_CSE_DMR_UPD_006_SCH_LBL()); execute(TC_CSE_DMR_UPD_004_PCH_LBL_ACP_LBL());
execute(TC_CSE_DMR_UPD_006_PCH_LBL()); execute(TC_CSE_DMR_UPD_004_SUB_ET_LBL_EXC());
execute(TC_CSE_DMR_UPD_006_SUB_LBL()); execute(TC_CSE_DMR_UPD_005_CNT_EXC());
execute(TC_CSE_DMR_UPD_007_CNT_CT()); execute(TC_CSE_DMR_UPD_005_GRP_EXC());
execute(TC_CSE_DMR_UPD_007_GRP_CT()); execute(TC_CSE_DMR_UPD_005_ACP_EXC());
execute(TC_CSE_DMR_UPD_007_ACP_CT()); execute(TC_CSE_DMR_UPD_005_SCH_EXC());
execute(TC_CSE_DMR_UPD_007_SCH_CT()); execute(TC_CSE_DMR_UPD_005_PCH_EXC());
execute(TC_CSE_DMR_UPD_007_PCH_CT()); execute(TC_CSE_DMR_UPD_005_SUB_MNI());
execute(TC_CSE_DMR_UPD_007_SUB_CT()); execute(TC_CSE_DMR_UPD_006_CNT_LBL());
execute(TC_CSE_DMR_UPD_008_CNT_ET()); execute(TC_CSE_DMR_UPD_006_GRP_LBL());
execute(TC_CSE_DMR_UPD_008_GRP_ET()); execute(TC_CSE_DMR_UPD_006_ACP_LBL());
execute(TC_CSE_DMR_UPD_008_ACP_ET()); execute(TC_CSE_DMR_UPD_006_SCH_LBL());
execute(TC_CSE_DMR_UPD_008_SCH_ET()); execute(TC_CSE_DMR_UPD_006_PCH_LBL());
execute(TC_CSE_DMR_UPD_008_PCH_ET()); execute(TC_CSE_DMR_UPD_006_SUB_LBL());
execute(TC_CSE_DMR_UPD_008_SUB_ET()); execute(TC_CSE_DMR_UPD_007_CNT_CT());
execute(TC_CSE_DMR_UPD_010()); execute(TC_CSE_DMR_UPD_007_GRP_CT());
execute(TC_CSE_DMR_DEL_001_CNT()); execute(TC_CSE_DMR_UPD_007_ACP_CT());
execute(TC_CSE_DMR_DEL_001_GRP()); execute(TC_CSE_DMR_UPD_007_SCH_CT());
execute(TC_CSE_DMR_DEL_001_ACP()); execute(TC_CSE_DMR_UPD_007_PCH_CT());
execute(TC_CSE_DMR_DEL_001_SCH()); execute(TC_CSE_DMR_UPD_007_SUB_CT());
execute(TC_CSE_DMR_DEL_001_PCH()); execute(TC_CSE_DMR_UPD_008_CNT_ET());
execute(TC_CSE_DMR_DEL_001_SUB()); execute(TC_CSE_DMR_UPD_008_GRP_ET());
execute(TC_CSE_DMR_DEL_001_CIN()); execute(TC_CSE_DMR_UPD_008_ACP_ET());
execute(TC_CSE_DMR_DEL_002_CNT()); execute(TC_CSE_DMR_UPD_008_SCH_ET());
execute(TC_CSE_DMR_DEL_002_GRP()); execute(TC_CSE_DMR_UPD_008_PCH_ET());
execute(TC_CSE_DMR_DEL_002_ACP()); execute(TC_CSE_DMR_UPD_008_SUB_ET());
execute(TC_CSE_DMR_DEL_002_SCH()); execute(TC_CSE_DMR_UPD_010());
execute(TC_CSE_DMR_DEL_002_PCH()); execute(TC_CSE_DMR_DEL_001_CNT());
execute(TC_CSE_DMR_DEL_002_SUB()); execute(TC_CSE_DMR_DEL_001_GRP());
execute(TC_CSE_DMR_DEL_003()); execute(TC_CSE_DMR_DEL_001_ACP());
execute(TC_CSE_DMR_DEL_004_CNT()); execute(TC_CSE_DMR_DEL_001_SCH());
execute(TC_CSE_DMR_DEL_004_GRP()); execute(TC_CSE_DMR_DEL_001_PCH());
execute(TC_CSE_DMR_DEL_004_ACP()); execute(TC_CSE_DMR_DEL_001_SUB());
execute(TC_CSE_DMR_DEL_004_SCH()); execute(TC_CSE_DMR_DEL_001_CIN());
execute(TC_CSE_DMR_DEL_004_PCH()); execute(TC_CSE_DMR_DEL_002_CNT());
execute(TC_CSE_DMR_DEL_004_SUB()); execute(TC_CSE_DMR_DEL_002_GRP());
execute(TC_CSE_DMR_DEL_005()); execute(TC_CSE_DMR_DEL_002_ACP());
execute(TC_CSE_DMR_DEL_007()); execute(TC_CSE_DMR_DEL_002_SCH());
execute(TC_CSE_DMR_DEL_008()); execute(TC_CSE_DMR_DEL_002_PCH());
execute(TC_CSE_DMR_DEL_009()); execute(TC_CSE_DMR_DEL_002_SUB());
execute(TC_CSE_DMR_DEL_010()); execute(TC_CSE_DMR_DEL_003());
execute(TC_CSE_LOC_BV_001()); execute(TC_CSE_DMR_DEL_004_CNT());
execute(TC_CSE_LOC_BV_002()); execute(TC_CSE_DMR_DEL_004_GRP());
execute(TC_CSE_LOC_BO_003()); execute(TC_CSE_DMR_DEL_004_ACP());
execute(TC_CSE_LOC_BO_004()); execute(TC_CSE_DMR_DEL_004_SCH());
execute(TC_CSE_LOC_BI_005()); execute(TC_CSE_DMR_DEL_004_PCH());
execute(TC_CSE_LOC_BV_006()); execute(TC_CSE_DMR_DEL_004_SUB());
execute(TC_CSE_LOC_BV_007()); execute(TC_CSE_DMR_DEL_005());
execute(TC_CSE_LOC_BV_008()); execute(TC_CSE_DMR_DEL_007());
execute(TC_CSE_LOC_BV_009_01()); execute(TC_CSE_DMR_DEL_008());
execute(TC_CSE_LOC_BV_009_02()); execute(TC_CSE_DMR_DEL_009());
execute(TC_CSE_LOC_BV_009_03()); execute(TC_CSE_DMR_DEL_010());
//execute(TC_CSE_LOC_BV_007());
//execute(TC_CSE_LOC_BV_008()); //CE_DMR_00002
execute(TC_CSE_LOC_BV_012());
execute(TC_CSE_LOC_BV_013()); //CE_SUB_00001
execute(TC_CSE_GMG_CRE_001());
execute(TC_CSE_GMG_CRE_002()); //CE_SUB_00004
execute(TC_CSE_GMG_CRE_003());
execute(TC_CSE_GMG_CRE_004()); //CE_SEC_00001
execute(TC_CSE_GMG_CRE_005());
execute(TC_CSE_GMG_CRE_006()); //CE_SEC_00002
execute(TC_CSE_GMG_CRE_007());
execute(TC_CSE_GMG_005_CRE());
execute(TC_CSE_GMG_005_UPD()); }
execute(TC_CSE_GMG_005_RET());
execute(TC_CSE_GMG_005_DEL()); } // end of module OneM2M_TestControl_IN_profile
execute(TC_CSE_GMG_006_CRE());
execute(TC_CSE_GMG_006_UPD());
execute(TC_CSE_GMG_006_RET());
execute(TC_CSE_GMG_006_DEL());
execute(TC_CSE_GMG_UPD_001());
execute(TC_CSE_GMG_UPD_002());
execute(TC_CSE_GMG_UPD_003());
execute(TC_CSE_GMG_UPD_004());
execute(TC_CSE_GMG_UPD_005());
execute(TC_CSE_GMG_UPD_006());
execute(TC_CSE_GMG_UPD_007());
execute(TC_CSE_GMG_UPD_008());
execute(TC_CSE_GMG_UPD_009());
execute(TC_CSE_GMG_UPD_010());
execute(TC_CSE_GMG_RET_001());
execute(TC_CSE_GMG_001_CRE());
execute(TC_CSE_GMG_001_UPD());
execute(TC_CSE_GMG_001_RET());
execute(TC_CSE_GMG_001_DEL());
execute(TC_CSE_GMG_002_CRE());
execute(TC_CSE_GMG_002_UPD());
execute(TC_CSE_GMG_002_RET());
execute(TC_CSE_GMG_002_DEL());
execute(TC_CSE_GMG_003_CRE());
execute(TC_CSE_GMG_003_UPD());
execute(TC_CSE_GMG_003_RET());
execute(TC_CSE_GMG_003_DEL());
execute(TC_CSE_GMG_004_CRE());
execute(TC_CSE_GMG_004_UPD());
execute(TC_CSE_GMG_004_RET());
execute(TC_CSE_GMG_004_DEL());
execute(TC_CSE_DIS_001());
execute(TC_CSE_DIS_003());
execute(TC_CSE_DIS_004());
execute(TC_CSE_DIS_005());
execute(TC_CSE_DIS_006());
execute(TC_CSE_DIS_007());
execute(TC_CSE_SUB_CRE_001_SUB());
execute(TC_CSE_SUB_CRE_001_CIN());
execute(TC_CSE_SUB_CRE_002());
execute(TC_CSE_SUB_CRE_003());
execute(TC_CSE_SUB_CRE_004());
execute(TC_CSE_SUB_CRE_005());
execute(TC_CSE_SUB_NTF_001());
execute(TC_CSE_SUB_NTF_002());
execute(TC_CSE_SUB_NTF_003());
execute(TC_CSE_SUB_UPD_001());
execute(TC_CSE_SUB_UPD_002());
execute(TC_CSE_SUB_UPD_003());
execute(TC_CSE_SUB_UPD_004());
execute(TC_CSE_SUB_UPD_005());
execute(TC_CSE_SUB_UPD_006());
execute(TC_CSE_SUB_UPD_007());
execute(TC_CSE_SUB_UPD_008());
execute(TC_CSE_SUB_UPD_009());
execute(TC_CSE_SUB_DEL_001());
execute(TC_CSE_SUB_DEL_002());
execute(TC_CSE_SUB_DEL_003());
execute(TC_CSE_SEC_ACP_001_CRE());
execute(TC_CSE_SEC_ACP_001_UPD());
execute(TC_CSE_SEC_ACP_001_RET());
execute(TC_CSE_SEC_ACP_001_DEL());
execute(TC_CSE_SEC_ACP_002_CRE());
execute(TC_CSE_SEC_ACP_002_UPD());
execute(TC_CSE_SEC_ACP_002_RET());
execute(TC_CSE_SEC_ACP_002_DEL());
execute(TC_CSE_SEC_ACP_003_CRE());
execute(TC_CSE_SEC_ACP_003_UPD());
execute(TC_CSE_SEC_ACP_003_RET());
execute(TC_CSE_SEC_ACP_003_DEL());
execute(TC_CSE_SEC_ACP_004_CRE());
execute(TC_CSE_SEC_ACP_004_UPD());
execute(TC_CSE_SEC_ACP_004_RET());
execute(TC_CSE_SEC_ACP_004_DEL());
execute(TC_CSE_SEC_ACP_011_CRE());
execute(TC_CSE_SEC_ACP_011_UPD());
execute(TC_CSE_SEC_ACP_011_RET());
execute(TC_CSE_SEC_ACP_011_DEL());
execute(TC_CSE_SEC_ACP_012_CRE());
execute(TC_CSE_SEC_ACP_012_UPD());
execute(TC_CSE_SEC_ACP_012_RET());
execute(TC_CSE_SEC_ACP_012_DEL());
execute(TC_CSE_SEC_ACP_CRE_001());
execute(TC_CSE_SEC_ACP_CRE_002());
execute(TC_CSE_SEC_ACP_UPD_001());
execute(TC_CSE_SEC_ACP_UPD_002());
}
} // end of module
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