diff --git a/LibOneM2M/OneM2M_Functions.ttcn b/LibOneM2M/OneM2M_Functions.ttcn
index 00ca8d537245a5bb1d7abefc2cc448017caf414d..36926622b613d3e6d6c77dfeaee51a8afd3541ae 100644
--- a/LibOneM2M/OneM2M_Functions.ttcn
+++ b/LibOneM2M/OneM2M_Functions.ttcn
@@ -168,6 +168,7 @@ module OneM2M_Functions {
// Map
map(self:mcaPort, system:mcaPort);//TODO To be consistent, we should use mcaPortIn for AE testing
map(self:acPort, system:acPort);
+ map(self:utPort, system:utPort);
activate(a_default());
activate(a_ae_cf03());
@@ -187,6 +188,7 @@ module OneM2M_Functions {
// Map
map(self:mccPort, system:mccPort);
+ map(self:mccPortIn, system:mccPortIn);
map(self:acPort, system:acPort);
activate(a_default());
activate(a_cse_cf04());
@@ -247,6 +249,7 @@ module OneM2M_Functions {
function f_cf03Down() runs on CseSimu {
unmap(self:mcaPort, system:mcaPort);
+ unmap(self:utPort, system:utPort);
unmap(self:acPort, system:acPort);
}
@@ -256,6 +259,7 @@ module OneM2M_Functions {
function f_cf04Down() runs on CseSimu {
unmap(self:mccPort, system:mccPort);
+ unmap(self:mccPortIn, system:mccPortIn);
unmap(self:acPort, system:acPort);
}
@@ -1599,7 +1603,7 @@ module OneM2M_Functions {
v_remoteCSEResource := f_cse_generateLocalResource(v_request.primitive.requestPrimitive.primitiveContent, 1, int16);//TODO Get index from v_request.primitive.requestPrimitive.to_
v_localResourceIndex := f_setLocalResource(v_remoteCSEResource, int16, -1);
- v_response := m_responsePrimitive(int2001,v_request.primitive.requestPrimitive.requestIdentifier);
+ v_response := valueof(m_responsePrimitive(int2001,v_request.primitive.requestPrimitive.requestIdentifier));
v_response.from_ := PX_CSE1_ID;
v_response.to_ := v_request.primitive.requestPrimitive.from_;
v_response.primitiveContent.remoteCSE := vc_localResourcesList[v_localResourceIndex].resource.remoteCSE;
diff --git a/LibOneM2M/OneM2M_TestSystem.ttcn b/LibOneM2M/OneM2M_TestSystem.ttcn
index 08bd6f5194ff597de74ff648e3b2b70db014313e..76b0aa1ff006de292893b124c230e4c8463fc8e4 100644
--- a/LibOneM2M/OneM2M_TestSystem.ttcn
+++ b/LibOneM2M/OneM2M_TestSystem.ttcn
@@ -78,6 +78,7 @@ module OneM2M_TestSystem {
type component AeSystem {
port OneM2MPort mcaPort;
port AdapterControlPort acPort;
+ port UpperTesterPort utPort;
}
diff --git a/LibOneM2M/OneM2M_Types.ttcn b/LibOneM2M/OneM2M_Types.ttcn
index 71125c36ac2172260388f222752b50348c176062..3b4354e8e2ba904e780750d4a7a3ad4dac309c6b 100644
--- a/LibOneM2M/OneM2M_Types.ttcn
+++ b/LibOneM2M/OneM2M_Types.ttcn
@@ -4131,10 +4131,16 @@ module OneM2M_Types {
encode "adapter";
}
- type RequestPrimitive UtTriggerPrimitive;
+ type RequestPrimitive UtTriggerPrimitive
+ with {
+ encode "UpperTester"
+ }
+
+ type ResponsePrimitive UtTriggerAckPrimitive
+ with {
+ encode "UpperTester"
+ }
- type ResponsePrimitive UtTriggerAckPrimitive;
-
type record AttributeAux {
XSD.NCName name,
charstring value_ optional
diff --git a/OneM2M_TestControl_ADN_profile_3.ttcn b/OneM2M_TestControl_ADN_profile_3.ttcn
new file mode 100644
index 0000000000000000000000000000000000000000..e6d2ce3b4d7efe3a5e30088a746b7268c4c6560e
--- /dev/null
+++ b/OneM2M_TestControl_ADN_profile_3.ttcn
@@ -0,0 +1,36 @@
+/**
+ * Copyright Notification
+ * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
+ * The copyright and the foregoing restriction extend to reproduction in all media.
+ * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
+ * All rights reserved.
+ *
+ * @author ETSI
+ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
+ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
+ * @desc Test control module for oneM2M
+ *
+ */
+module OneM2M_TestControl_ADN_profile_3 {
+
+
+ import from OneM2M_Testcases_CSE all;
+
+
+
+ control {
+
+ //AE_GEN_00001
+
+ //AE_GEN_00002
+
+ //AE_REG_00002
+
+ //AE_DMR_00001
+
+ //AE_DMR_00002
+
+ }
+
+} // end of module OneM2M_TestControl_ADN_profile_3
+
diff --git a/OneM2M_TestControl_ADN_profile_4.ttcn b/OneM2M_TestControl_ADN_profile_4.ttcn
new file mode 100644
index 0000000000000000000000000000000000000000..b590f098b84a6b7255322ff38b298c919978fbd1
--- /dev/null
+++ b/OneM2M_TestControl_ADN_profile_4.ttcn
@@ -0,0 +1,37 @@
+/**
+ * Copyright Notification
+ * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
+ * The copyright and the foregoing restriction extend to reproduction in all media.
+ * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
+ * All rights reserved.
+ *
+ * @author ETSI
+ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
+ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
+ * @desc Test control module for oneM2M
+ *
+ */
+module OneM2M_TestControl_ADN_profile_4 {
+
+
+ import from OneM2M_Testcases_CSE all;
+
+
+ control {
+
+ //AE_GEN_00001
+
+ //AE_GEN_00002
+
+ //AE_REG_00001
+
+ //AE_REG_00002
+
+ //AE_DMR_00001
+
+ //AE_DMR_00002
+
+ }
+
+} // end of module OneM2M_TestControl_ADN_profile_4
+
diff --git a/OneM2M_TestControl_Constrained_actuator_as_ADN.ttcn b/OneM2M_TestControl_Constrained_actuator_as_ADN.ttcn
new file mode 100644
index 0000000000000000000000000000000000000000..f1386fcd56c1e6954fc86ca4284f3919d3776060
--- /dev/null
+++ b/OneM2M_TestControl_Constrained_actuator_as_ADN.ttcn
@@ -0,0 +1,35 @@
+/**
+ * Copyright Notification
+ * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
+ * The copyright and the foregoing restriction extend to reproduction in all media.
+ * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
+ * All rights reserved.
+ *
+ * @author ETSI
+ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
+ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
+ * @desc Test control module for oneM2M
+ *
+ */
+module OneM2M_TestControl_Constrained_actuator_as_ADN {
+
+
+ import from OneM2M_Testcases_CSE all;
+
+
+
+ control {
+
+ //AE_GEN_00001
+
+ //AE_GEN_00002
+
+ //AE_REG_00002
+
+ //AE_SUB_00001
+
+ }
+
+
+} // end of module OneM2M_TestControl_Constrained_actuator_as_ADN
+
diff --git a/OneM2M_TestControl_Constrained_sensor_as_ADN.ttcn b/OneM2M_TestControl_Constrained_sensor_as_ADN.ttcn
new file mode 100644
index 0000000000000000000000000000000000000000..1c4aa14e8696a0e8238f958dd8ed759e87a99c64
--- /dev/null
+++ b/OneM2M_TestControl_Constrained_sensor_as_ADN.ttcn
@@ -0,0 +1,31 @@
+/**
+ * Copyright Notification
+ * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
+ * The copyright and the foregoing restriction extend to reproduction in all media.
+ * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
+ * All rights reserved.
+ *
+ * @author ETSI
+ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
+ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
+ * @desc Test control module for oneM2M
+ *
+ */
+module OneM2M_TestControl_Constrained_sensor_as_ADN {
+
+
+ import from OneM2M_Testcases_CSE all;
+
+
+
+ control {
+
+ //AE_GEN_00001
+
+ //AE_GEN_00002
+
+ //AE_DMR_00002
+ }
+
+} // end of module OneM2M_TestControl_Constrained_sensor_as_ADN
+
diff --git a/OneM2M_TestControl.ttcn b/OneM2M_TestControl_IN_profile.ttcn
similarity index 69%
rename from OneM2M_TestControl.ttcn
rename to OneM2M_TestControl_IN_profile.ttcn
index 2c04d344d62101dd41586a4ae259aa4b019ada0c..082f108f92e298710ee6d724c133c65fdd759ff6 100644
--- a/OneM2M_TestControl.ttcn
+++ b/OneM2M_TestControl_IN_profile.ttcn
@@ -1,371 +1,281 @@
-/**
- * Copyright Notification
- * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
- * The copyright and the foregoing restriction extend to reproduction in all media.
- * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
- * All rights reserved.
- *
- * @author ETSI
- * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
- * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
- * @desc Test control module for oneM2M
- *
- */
-module OneM2M_TestControl {
-
-
- import from OneM2M_Testcases_CSE all;
-
- control {
- execute(TC_CSE_GEN_CRE_001_CSR());
- execute(TC_CSE_GEN_CRE_001_SPR());
- execute(TC_CSE_GEN_CRE_001_ABS());
- execute(TC_CSE_GEN_RET_001_CSR());
- execute(TC_CSE_GEN_RET_001_SPR());
- execute(TC_CSE_GEN_RET_001_ABS());
- execute(TC_CSE_GEN_UPD_001_CSR());
- execute(TC_CSE_GEN_UPD_001_SPR());
- execute(TC_CSE_GEN_UPD_001_ABS());
- execute(TC_CSE_GEN_DEL_001_CSR());
- execute(TC_CSE_GEN_DEL_001_SPR());
- execute(TC_CSE_GEN_DEL_001_ABS());
- execute(TC_CSE_REG_CRE_001());
- execute(TC_CSE_REG_CRE_002());
- execute(TC_CSE_REG_CRE_004());
- execute(TC_CSE_REG_CRE_005());
- execute(TC_CSE_REG_CRE_008());
- execute(TC_CSE_REG_CRE_009());
- execute(TC_CSE_REG_CRE_010());
- execute(TC_CSE_REG_CRE_012_AE_APN());
- execute(TC_CSE_REG_CRE_012_AE_LBL());
- execute(TC_CSE_REG_CRE_012_AE_NL());
- execute(TC_CSE_REG_CRE_012_AE_OR());
- execute(TC_CSE_REG_CRE_012_AE_POA());
- execute(TC_CSE_REG_CRE_013_LBL());
- execute(TC_CSE_REG_CRE_013_CST());
- execute(TC_CSE_REG_CRE_013_POA());
- execute(TC_CSE_REG_CRE_013_NL());
- execute(TC_CSE_REG_CRE_016());
- execute(TC_CSE_REG_CRE_017_API());
- execute(TC_CSE_REG_CRE_017_RR());
- execute(TC_CSE_REG_CRE_018());
- execute(TC_CSE_REG_CRE_019());
- execute(TC_CSE_REG_CRE_021());
- execute(TC_CSE_REG_CRE_023());
- execute(TC_CSE_REG_CRE_027());
- execute(TC_CSE_REG_CRE_028_ET());
- execute(TC_CSE_REG_CRE_028_LBL());
- execute(TC_CSE_REG_CRE_028_NL());
- execute(TC_CSE_REG_CRE_028_POA());
- execute(TC_CSE_REG_CRE_028_RN());
- execute(TC_CSE_REG_RET_001());
- execute(TC_CSE_REG_RET_005());
- execute(TC_CSE_REG_RET_008());
- execute(TC_CSE_REG_UPD_001());
- execute(TC_CSE_REG_DEL_001());
-
- execute(TC_CSE_DMR_CRE_001_CNT_CB());
- execute(TC_CSE_DMR_CRE_001_CNT_AE());
- execute(TC_CSE_DMR_CRE_001_CNT_CNT());
- execute(TC_CSE_DMR_CRE_001_GRP_CB());
- execute(TC_CSE_DMR_CRE_001_GRP_AE());
- execute(TC_CSE_DMR_CRE_001_ACP_CB());
- execute(TC_CSE_DMR_CRE_001_ACP_AE());
- execute(TC_CSE_DMR_CRE_001_SCH_CB());
- execute(TC_CSE_DMR_CRE_001_SCH_AE());
- execute(TC_CSE_DMR_CRE_001_SCH_SUB());
- execute(TC_CSE_DMR_CRE_001_PCH_AE());
- execute(TC_CSE_DMR_CRE_001_SUB_CB());
- execute(TC_CSE_DMR_CRE_001_SUB_AE());
- execute(TC_CSE_DMR_CRE_001_SUB_CNT());
- execute(TC_CSE_DMR_CRE_001_SUB_ACP());
- execute(TC_CSE_DMR_CRE_001_SUB_SCH());
- execute(TC_CSE_DMR_CRE_001_SUB_GRP());
- execute(TC_CSE_DMR_CRE_001_NOD_CB());
- execute(TC_CSE_DMR_CRE_001_MGC_CB());
- execute(TC_CSE_DMR_CRE_001_LCP_CB());
- execute(TC_CSE_DMR_CRE_001_STCG_CB());
- execute(TC_CSE_DMR_CRE_001_STCL_CB());
- execute(TC_CSE_DMR_CRE_001_MSSP_CB());
- execute(TC_CSE_DMR_CRE_001_ASAR_CB());
- execute(TC_CSE_DMR_CRE_001_CIN_CNT());
- execute(TC_CSE_DMR_CRE_002_CNT());
- execute(TC_CSE_DMR_CRE_002_GRP());
- execute(TC_CSE_DMR_CRE_002_ACP());
- execute(TC_CSE_DMR_CRE_002_SCH());
- execute(TC_CSE_DMR_CRE_002_PCH());
- execute(TC_CSE_DMR_CRE_002_SUB());
- execute(TC_CSE_DMR_CRE_003_CNT());
- execute(TC_CSE_DMR_CRE_003_GRP());
- execute(TC_CSE_DMR_CRE_003_ACP());
- execute(TC_CSE_DMR_CRE_003_SCH());
- execute(TC_CSE_DMR_CRE_003_PCH());
- execute(TC_CSE_DMR_CRE_003_SUB());
- execute(TC_CSE_DMR_CRE_004_CNT());
- execute(TC_CSE_DMR_CRE_004_GRP());
- execute(TC_CSE_DMR_CRE_004_ACP());
- execute(TC_CSE_DMR_CRE_004_SCH());
- execute(TC_CSE_DMR_CRE_004_PCH());
- execute(TC_CSE_DMR_CRE_004_SUB());
- execute(TC_CSE_DMR_RET_001_CNT());
- execute(TC_CSE_DMR_RET_001_GRP());
- execute(TC_CSE_DMR_RET_001_ACP());
- execute(TC_CSE_DMR_RET_001_SCH());
- execute(TC_CSE_DMR_RET_001_PCH());
- execute(TC_CSE_DMR_RET_001_SUB());
- execute(TC_CSE_DMR_RET_001_CIN());
- execute(TC_CSE_DMR_RET_002());
- execute(TC_CSE_DMR_RET_003_CNT());
- execute(TC_CSE_DMR_RET_003_GRP());
- execute(TC_CSE_DMR_RET_003_ACP());
- execute(TC_CSE_DMR_RET_003_SCH());
- execute(TC_CSE_DMR_RET_003_PCH());
- execute(TC_CSE_DMR_RET_003_SUB());
- execute(TC_CSE_DMR_RET_004_CNT());
- execute(TC_CSE_DMR_RET_004_GRP());
- execute(TC_CSE_DMR_RET_004_ACP());
- execute(TC_CSE_DMR_RET_004_SCH());
- execute(TC_CSE_DMR_RET_004_PCH());
- execute(TC_CSE_DMR_RET_004_SUB());
- execute(TC_CSE_DMR_RET_005_CNT());
- execute(TC_CSE_DMR_RET_005_GRP());
- execute(TC_CSE_DMR_RET_005_ACP());
- execute(TC_CSE_DMR_RET_005_SCH());
- execute(TC_CSE_DMR_RET_005_PCH());
- execute(TC_CSE_DMR_RET_005_SUB());
- execute(TC_CSE_DMR_RET_006_CNT());
- execute(TC_CSE_DMR_RET_006_GRP());
- execute(TC_CSE_DMR_RET_006_ACP());
- execute(TC_CSE_DMR_RET_006_SCH());
- execute(TC_CSE_DMR_RET_006_PCH());
- execute(TC_CSE_DMR_RET_006_SUB());
- execute(TC_CSE_DMR_RET_007_CNT_LBL());
- execute(TC_CSE_DMR_RET_007_GRP_LBL());
- execute(TC_CSE_DMR_RET_007_ACP_LBL());
- execute(TC_CSE_DMR_RET_007_SCH_LBL());
- execute(TC_CSE_DMR_RET_007_PCH_LBL());
- execute(TC_CSE_DMR_RET_007_SUB_LBL());
- execute(TC_CSE_DMR_RET_008_CNT_AT());
- execute(TC_CSE_DMR_RET_008_GRP_AT());
- execute(TC_CSE_DMR_RET_008_ACP_AT());
- execute(TC_CSE_DMR_RET_008_SCH_AT());
- execute(TC_CSE_DMR_RET_008_PCH_AT());
- execute(TC_CSE_DMR_RET_008_SUB_AT());
- execute(TC_CSE_DMR_RET_020_RCN_0());
- execute(TC_CSE_DMR_RET_020_RCN_2());
- execute(TC_CSE_DMR_RET_020_RCN_3());
- execute(TC_CSE_DMR_RET_021_CNT());
- execute(TC_CSE_DMR_RET_021_GRP());
- execute(TC_CSE_DMR_RET_021_ACP());
- execute(TC_CSE_DMR_RET_021_SCH());
- execute(TC_CSE_DMR_RET_021_PCH());
- execute(TC_CSE_DMR_RET_021_SUB());
- execute(TC_CSE_DMR_RET_022_CNT());
- execute(TC_CSE_DMR_RET_022_GRP());
- execute(TC_CSE_DMR_RET_022_ACP());
- execute(TC_CSE_DMR_RET_022_SCH());
- execute(TC_CSE_DMR_RET_022_PCH());
- execute(TC_CSE_DMR_RET_022_SUB());
- execute(TC_CSE_DMR_RET_023_CNT());
- execute(TC_CSE_DMR_RET_023_GRP());
- execute(TC_CSE_DMR_RET_023_ACP());
- execute(TC_CSE_DMR_RET_023_SCH());
- execute(TC_CSE_DMR_RET_023_PCH());
- execute(TC_CSE_DMR_RET_023_SUB());
- execute(TC_CSE_DMR_RET_024_CNT());
- execute(TC_CSE_DMR_RET_024_GRP());
- execute(TC_CSE_DMR_RET_024_ACP());
- execute(TC_CSE_DMR_RET_024_SCH());
- execute(TC_CSE_DMR_RET_024_PCH());
- execute(TC_CSE_DMR_RET_024_SUB());
- execute(TC_CSE_DMR_UPD_001_CNT_LBL());
- execute(TC_CSE_DMR_UPD_001_GRP_LBL());
- execute(TC_CSE_DMR_UPD_001_ACP_LBL());
- execute(TC_CSE_DMR_UPD_001_SCH_LBL());
- execute(TC_CSE_DMR_UPD_001_PCH_LBL());
- execute(TC_CSE_DMR_UPD_001_SUB_LBL());
- execute(TC_CSE_DMR_UPD_002_CNT_LBL());
- execute(TC_CSE_DMR_UPD_002_GRP_LBL());
- execute(TC_CSE_DMR_UPD_002_ACP_LBL());
- execute(TC_CSE_DMR_UPD_002_SCH_LBL());
- execute(TC_CSE_DMR_UPD_002_PCH_LBL());
- execute(TC_CSE_DMR_UPD_002_SUB_LBL());
- execute(TC_CSE_DMR_UPD_003_CNT_LBL());
- execute(TC_CSE_DMR_UPD_003_GRP_LBL());
- execute(TC_CSE_DMR_UPD_003_ACP_LBL());
- execute(TC_CSE_DMR_UPD_003_SCH_LBL());
- execute(TC_CSE_DMR_UPD_003_PCH_LBL());
- execute(TC_CSE_DMR_UPD_003_SUB_LBL());
- execute(TC_CSE_DMR_UPD_004_CNT_ET_MNI_LBL());
- execute(TC_CSE_DMR_UPD_004_GRP_ET_GN_LBL());
- execute(TC_CSE_DMR_UPD_004_ACP_PV_AT_LBL());
- execute(TC_CSE_DMR_UPD_004_SCH_SE_AT_LBL());
- execute(TC_CSE_DMR_UPD_004_PCH_LBL_ACP_LBL());
- execute(TC_CSE_DMR_UPD_004_SUB_ET_LBL_EXC());
- execute(TC_CSE_DMR_UPD_005_CNT_EXC());
- execute(TC_CSE_DMR_UPD_005_GRP_EXC());
- execute(TC_CSE_DMR_UPD_005_ACP_EXC());
- execute(TC_CSE_DMR_UPD_005_SCH_EXC());
- execute(TC_CSE_DMR_UPD_005_PCH_EXC());
- execute(TC_CSE_DMR_UPD_005_SUB_MNI());
- execute(TC_CSE_DMR_UPD_006_CNT_LBL());
- execute(TC_CSE_DMR_UPD_006_GRP_LBL());
- execute(TC_CSE_DMR_UPD_006_ACP_LBL());
- execute(TC_CSE_DMR_UPD_006_SCH_LBL());
- execute(TC_CSE_DMR_UPD_006_PCH_LBL());
- execute(TC_CSE_DMR_UPD_006_SUB_LBL());
- execute(TC_CSE_DMR_UPD_007_CNT_CT());
- execute(TC_CSE_DMR_UPD_007_GRP_CT());
- execute(TC_CSE_DMR_UPD_007_ACP_CT());
- execute(TC_CSE_DMR_UPD_007_SCH_CT());
- execute(TC_CSE_DMR_UPD_007_PCH_CT());
- execute(TC_CSE_DMR_UPD_007_SUB_CT());
- execute(TC_CSE_DMR_UPD_008_CNT_ET());
- execute(TC_CSE_DMR_UPD_008_GRP_ET());
- execute(TC_CSE_DMR_UPD_008_ACP_ET());
- execute(TC_CSE_DMR_UPD_008_SCH_ET());
- execute(TC_CSE_DMR_UPD_008_PCH_ET());
- execute(TC_CSE_DMR_UPD_008_SUB_ET());
- execute(TC_CSE_DMR_UPD_010());
- execute(TC_CSE_DMR_DEL_001_CNT());
- execute(TC_CSE_DMR_DEL_001_GRP());
- execute(TC_CSE_DMR_DEL_001_ACP());
- execute(TC_CSE_DMR_DEL_001_SCH());
- execute(TC_CSE_DMR_DEL_001_PCH());
- execute(TC_CSE_DMR_DEL_001_SUB());
- execute(TC_CSE_DMR_DEL_001_CIN());
- execute(TC_CSE_DMR_DEL_002_CNT());
- execute(TC_CSE_DMR_DEL_002_GRP());
- execute(TC_CSE_DMR_DEL_002_ACP());
- execute(TC_CSE_DMR_DEL_002_SCH());
- execute(TC_CSE_DMR_DEL_002_PCH());
- execute(TC_CSE_DMR_DEL_002_SUB());
- execute(TC_CSE_DMR_DEL_003());
- execute(TC_CSE_DMR_DEL_004_CNT());
- execute(TC_CSE_DMR_DEL_004_GRP());
- execute(TC_CSE_DMR_DEL_004_ACP());
- execute(TC_CSE_DMR_DEL_004_SCH());
- execute(TC_CSE_DMR_DEL_004_PCH());
- execute(TC_CSE_DMR_DEL_004_SUB());
- execute(TC_CSE_DMR_DEL_005());
- execute(TC_CSE_DMR_DEL_007());
- execute(TC_CSE_DMR_DEL_008());
- execute(TC_CSE_DMR_DEL_009());
- execute(TC_CSE_DMR_DEL_010());
- execute(TC_CSE_LOC_BV_001());
- execute(TC_CSE_LOC_BV_002());
- execute(TC_CSE_LOC_BO_003());
- execute(TC_CSE_LOC_BO_004());
- execute(TC_CSE_LOC_BI_005());
- execute(TC_CSE_LOC_BV_006());
- execute(TC_CSE_LOC_BV_007());
- execute(TC_CSE_LOC_BV_008());
- execute(TC_CSE_LOC_BV_009_01());
- execute(TC_CSE_LOC_BV_009_02());
- execute(TC_CSE_LOC_BV_009_03());
- //execute(TC_CSE_LOC_BV_007());
- //execute(TC_CSE_LOC_BV_008());
- execute(TC_CSE_LOC_BV_012());
- execute(TC_CSE_LOC_BV_013());
- execute(TC_CSE_GMG_CRE_001());
- execute(TC_CSE_GMG_CRE_002());
- execute(TC_CSE_GMG_CRE_003());
- execute(TC_CSE_GMG_CRE_004());
- execute(TC_CSE_GMG_CRE_005());
- execute(TC_CSE_GMG_CRE_006());
- execute(TC_CSE_GMG_CRE_007());
- execute(TC_CSE_GMG_005_CRE());
- execute(TC_CSE_GMG_005_UPD());
- execute(TC_CSE_GMG_005_RET());
- execute(TC_CSE_GMG_005_DEL());
- execute(TC_CSE_GMG_006_CRE());
- execute(TC_CSE_GMG_006_UPD());
- execute(TC_CSE_GMG_006_RET());
- execute(TC_CSE_GMG_006_DEL());
- execute(TC_CSE_GMG_UPD_001());
- execute(TC_CSE_GMG_UPD_002());
- execute(TC_CSE_GMG_UPD_003());
- execute(TC_CSE_GMG_UPD_004());
- execute(TC_CSE_GMG_UPD_005());
- execute(TC_CSE_GMG_UPD_006());
- execute(TC_CSE_GMG_UPD_007());
- execute(TC_CSE_GMG_UPD_008());
- execute(TC_CSE_GMG_UPD_009());
- execute(TC_CSE_GMG_UPD_010());
- execute(TC_CSE_GMG_RET_001());
- execute(TC_CSE_GMG_001_CRE());
- execute(TC_CSE_GMG_001_UPD());
- execute(TC_CSE_GMG_001_RET());
- execute(TC_CSE_GMG_001_DEL());
- execute(TC_CSE_GMG_002_CRE());
- execute(TC_CSE_GMG_002_UPD());
- execute(TC_CSE_GMG_002_RET());
- execute(TC_CSE_GMG_002_DEL());
- execute(TC_CSE_GMG_003_CRE());
- execute(TC_CSE_GMG_003_UPD());
- execute(TC_CSE_GMG_003_RET());
- execute(TC_CSE_GMG_003_DEL());
- execute(TC_CSE_GMG_004_CRE());
- execute(TC_CSE_GMG_004_UPD());
- execute(TC_CSE_GMG_004_RET());
- execute(TC_CSE_GMG_004_DEL());
- execute(TC_CSE_DIS_001());
- execute(TC_CSE_DIS_003());
- execute(TC_CSE_DIS_004());
- execute(TC_CSE_DIS_005());
- execute(TC_CSE_DIS_006());
- execute(TC_CSE_DIS_007());
- execute(TC_CSE_SUB_CRE_001_SUB());
- execute(TC_CSE_SUB_CRE_001_CIN());
- execute(TC_CSE_SUB_CRE_002());
- execute(TC_CSE_SUB_CRE_003());
- execute(TC_CSE_SUB_CRE_004());
- execute(TC_CSE_SUB_CRE_005());
- execute(TC_CSE_SUB_NTF_001());
- execute(TC_CSE_SUB_NTF_002());
- execute(TC_CSE_SUB_NTF_003());
- execute(TC_CSE_SUB_UPD_001());
- execute(TC_CSE_SUB_UPD_002());
- execute(TC_CSE_SUB_UPD_003());
- execute(TC_CSE_SUB_UPD_004());
- execute(TC_CSE_SUB_UPD_005());
- execute(TC_CSE_SUB_UPD_006());
- execute(TC_CSE_SUB_UPD_007());
- execute(TC_CSE_SUB_UPD_008());
- execute(TC_CSE_SUB_UPD_009());
- execute(TC_CSE_SUB_DEL_001());
- execute(TC_CSE_SUB_DEL_002());
- execute(TC_CSE_SUB_DEL_003());
-
- execute(TC_CSE_SEC_ACP_001_CRE());
- execute(TC_CSE_SEC_ACP_001_UPD());
- execute(TC_CSE_SEC_ACP_001_RET());
- execute(TC_CSE_SEC_ACP_001_DEL());
- execute(TC_CSE_SEC_ACP_002_CRE());
- execute(TC_CSE_SEC_ACP_002_UPD());
- execute(TC_CSE_SEC_ACP_002_RET());
- execute(TC_CSE_SEC_ACP_002_DEL());
- execute(TC_CSE_SEC_ACP_003_CRE());
- execute(TC_CSE_SEC_ACP_003_UPD());
- execute(TC_CSE_SEC_ACP_003_RET());
- execute(TC_CSE_SEC_ACP_003_DEL());
- execute(TC_CSE_SEC_ACP_004_CRE());
- execute(TC_CSE_SEC_ACP_004_UPD());
- execute(TC_CSE_SEC_ACP_004_RET());
- execute(TC_CSE_SEC_ACP_004_DEL());
- execute(TC_CSE_SEC_ACP_011_CRE());
- execute(TC_CSE_SEC_ACP_011_UPD());
- execute(TC_CSE_SEC_ACP_011_RET());
- execute(TC_CSE_SEC_ACP_011_DEL());
- execute(TC_CSE_SEC_ACP_012_CRE());
- execute(TC_CSE_SEC_ACP_012_UPD());
- execute(TC_CSE_SEC_ACP_012_RET());
- execute(TC_CSE_SEC_ACP_012_DEL());
- execute(TC_CSE_SEC_ACP_CRE_001());
- execute(TC_CSE_SEC_ACP_CRE_002());
- execute(TC_CSE_SEC_ACP_UPD_001());
- execute(TC_CSE_SEC_ACP_UPD_002());
- }
-
-} // end of module
-
+/**
+ * Copyright Notification
+ * No part of this document may be reproduced, in an electronic retrieval system or otherwise, except as authorized by written permission.
+ * The copyright and the foregoing restriction extend to reproduction in all media.
+ * © 2016, oneM2M Partners Type 1 (ARIB, ATIS, CCSA, ETSI, TIA, TSDSI, TTA, TTC).
+ * All rights reserved.
+ *
+ * @author ETSI
+ * @version $URL: https://oldforge.etsi.org/svn/oneM2M/branches/Release1/ttcn/OneM2M_TestControl.ttcn $
+ * $Id: OneM2M_TestControl.ttcn 347 2017-08-11 08:48:20Z reinaortega $
+ * @desc Test control module for oneM2M
+ *
+ */
+module OneM2M_TestControl_IN_profile {
+
+
+ import from OneM2M_Testcases_CSE all;
+
+ control {
+
+ //CE_GEN_00001
+ execute(TC_CSE_GEN_CRE_001_CSR());
+ execute(TC_CSE_GEN_CRE_001_SPR());
+ execute(TC_CSE_GEN_CRE_001_ABS());
+ execute(TC_CSE_GEN_RET_001_CSR());
+ execute(TC_CSE_GEN_RET_001_SPR());
+ execute(TC_CSE_GEN_RET_001_ABS());
+ execute(TC_CSE_GEN_UPD_001_CSR());
+ execute(TC_CSE_GEN_UPD_001_SPR());
+ execute(TC_CSE_GEN_UPD_001_ABS());
+ execute(TC_CSE_GEN_DEL_001_CSR());
+ execute(TC_CSE_GEN_DEL_001_SPR());
+ execute(TC_CSE_GEN_DEL_001_ABS());
+
+ //CE_GEN_00002
+
+ //CE_REG_00001
+ execute(TC_CSE_REG_CRE_001());
+ execute(TC_CSE_REG_CRE_002());
+ execute(TC_CSE_REG_CRE_004());
+ execute(TC_CSE_REG_CRE_005());
+ execute(TC_CSE_REG_CRE_008());
+ execute(TC_CSE_REG_CRE_009());
+ execute(TC_CSE_REG_CRE_010());
+ execute(TC_CSE_REG_CRE_012_AE_APN());
+ execute(TC_CSE_REG_CRE_012_AE_LBL());
+ execute(TC_CSE_REG_CRE_012_AE_NL());
+ execute(TC_CSE_REG_CRE_012_AE_OR());
+ execute(TC_CSE_REG_CRE_012_AE_POA());
+ execute(TC_CSE_REG_CRE_013_LBL());
+ execute(TC_CSE_REG_CRE_013_CST());
+ execute(TC_CSE_REG_CRE_013_POA());
+ execute(TC_CSE_REG_CRE_013_NL());
+ execute(TC_CSE_REG_CRE_016());
+ execute(TC_CSE_REG_CRE_017_API());
+ execute(TC_CSE_REG_CRE_017_RR());
+ execute(TC_CSE_REG_CRE_018());
+ execute(TC_CSE_REG_CRE_019());
+ execute(TC_CSE_REG_CRE_021());
+ execute(TC_CSE_REG_CRE_023());
+ execute(TC_CSE_REG_CRE_027());
+ execute(TC_CSE_REG_CRE_028_ET());
+ execute(TC_CSE_REG_CRE_028_LBL());
+ execute(TC_CSE_REG_CRE_028_NL());
+ execute(TC_CSE_REG_CRE_028_POA());
+ execute(TC_CSE_REG_CRE_028_RN());
+ execute(TC_CSE_REG_RET_001());
+ execute(TC_CSE_REG_RET_005());
+ execute(TC_CSE_REG_RET_008());
+ execute(TC_CSE_REG_UPD_001());
+ execute(TC_CSE_REG_DEL_001());
+
+ //CE_REG_00002
+
+ //CE_REG_00004
+
+ //CE_DMR_00001
+ execute(TC_CSE_DMR_CRE_001_CNT_CB());
+ execute(TC_CSE_DMR_CRE_001_CNT_AE());
+ execute(TC_CSE_DMR_CRE_001_CNT_CNT());
+ execute(TC_CSE_DMR_CRE_001_GRP_CB());
+ execute(TC_CSE_DMR_CRE_001_GRP_AE());
+ execute(TC_CSE_DMR_CRE_001_ACP_CB());
+ execute(TC_CSE_DMR_CRE_001_ACP_AE());
+ execute(TC_CSE_DMR_CRE_001_SCH_CB());
+ execute(TC_CSE_DMR_CRE_001_SCH_AE());
+ execute(TC_CSE_DMR_CRE_001_SCH_SUB());
+ execute(TC_CSE_DMR_CRE_001_PCH_AE());
+ execute(TC_CSE_DMR_CRE_001_SUB_CB());
+ execute(TC_CSE_DMR_CRE_001_SUB_AE());
+ execute(TC_CSE_DMR_CRE_001_SUB_CNT());
+ execute(TC_CSE_DMR_CRE_001_SUB_ACP());
+ execute(TC_CSE_DMR_CRE_001_SUB_SCH());
+ execute(TC_CSE_DMR_CRE_001_SUB_GRP());
+ execute(TC_CSE_DMR_CRE_001_NOD_CB());
+ execute(TC_CSE_DMR_CRE_001_MGC_CB());
+ execute(TC_CSE_DMR_CRE_001_LCP_CB());
+ execute(TC_CSE_DMR_CRE_001_STCG_CB());
+ execute(TC_CSE_DMR_CRE_001_STCL_CB());
+ execute(TC_CSE_DMR_CRE_001_MSSP_CB());
+ execute(TC_CSE_DMR_CRE_001_ASAR_CB());
+ execute(TC_CSE_DMR_CRE_001_CIN_CNT());
+ execute(TC_CSE_DMR_CRE_002_CNT());
+ execute(TC_CSE_DMR_CRE_002_GRP());
+ execute(TC_CSE_DMR_CRE_002_ACP());
+ execute(TC_CSE_DMR_CRE_002_SCH());
+ execute(TC_CSE_DMR_CRE_002_PCH());
+ execute(TC_CSE_DMR_CRE_002_SUB());
+ execute(TC_CSE_DMR_CRE_003_CNT());
+ execute(TC_CSE_DMR_CRE_003_GRP());
+ execute(TC_CSE_DMR_CRE_003_ACP());
+ execute(TC_CSE_DMR_CRE_003_SCH());
+ execute(TC_CSE_DMR_CRE_003_PCH());
+ execute(TC_CSE_DMR_CRE_003_SUB());
+ execute(TC_CSE_DMR_CRE_004_CNT());
+ execute(TC_CSE_DMR_CRE_004_GRP());
+ execute(TC_CSE_DMR_CRE_004_ACP());
+ execute(TC_CSE_DMR_CRE_004_SCH());
+ execute(TC_CSE_DMR_CRE_004_PCH());
+ execute(TC_CSE_DMR_CRE_004_SUB());
+ execute(TC_CSE_DMR_RET_001_CNT());
+ execute(TC_CSE_DMR_RET_001_GRP());
+ execute(TC_CSE_DMR_RET_001_ACP());
+ execute(TC_CSE_DMR_RET_001_SCH());
+ execute(TC_CSE_DMR_RET_001_PCH());
+ execute(TC_CSE_DMR_RET_001_SUB());
+ execute(TC_CSE_DMR_RET_001_CIN());
+ execute(TC_CSE_DMR_RET_002());
+ execute(TC_CSE_DMR_RET_003_CNT());
+ execute(TC_CSE_DMR_RET_003_GRP());
+ execute(TC_CSE_DMR_RET_003_ACP());
+ execute(TC_CSE_DMR_RET_003_SCH());
+ execute(TC_CSE_DMR_RET_003_PCH());
+ execute(TC_CSE_DMR_RET_003_SUB());
+ execute(TC_CSE_DMR_RET_004_CNT());
+ execute(TC_CSE_DMR_RET_004_GRP());
+ execute(TC_CSE_DMR_RET_004_ACP());
+ execute(TC_CSE_DMR_RET_004_SCH());
+ execute(TC_CSE_DMR_RET_004_PCH());
+ execute(TC_CSE_DMR_RET_004_SUB());
+ execute(TC_CSE_DMR_RET_005_CNT());
+ execute(TC_CSE_DMR_RET_005_GRP());
+ execute(TC_CSE_DMR_RET_005_ACP());
+ execute(TC_CSE_DMR_RET_005_SCH());
+ execute(TC_CSE_DMR_RET_005_PCH());
+ execute(TC_CSE_DMR_RET_005_SUB());
+ execute(TC_CSE_DMR_RET_006_CNT());
+ execute(TC_CSE_DMR_RET_006_GRP());
+ execute(TC_CSE_DMR_RET_006_ACP());
+ execute(TC_CSE_DMR_RET_006_SCH());
+ execute(TC_CSE_DMR_RET_006_PCH());
+ execute(TC_CSE_DMR_RET_006_SUB());
+ execute(TC_CSE_DMR_RET_007_CNT_LBL());
+ execute(TC_CSE_DMR_RET_007_GRP_LBL());
+ execute(TC_CSE_DMR_RET_007_ACP_LBL());
+ execute(TC_CSE_DMR_RET_007_SCH_LBL());
+ execute(TC_CSE_DMR_RET_007_PCH_LBL());
+ execute(TC_CSE_DMR_RET_007_SUB_LBL());
+ execute(TC_CSE_DMR_RET_008_CNT_AT());
+ execute(TC_CSE_DMR_RET_008_GRP_AT());
+ execute(TC_CSE_DMR_RET_008_ACP_AT());
+ execute(TC_CSE_DMR_RET_008_SCH_AT());
+ execute(TC_CSE_DMR_RET_008_PCH_AT());
+ execute(TC_CSE_DMR_RET_008_SUB_AT());
+ execute(TC_CSE_DMR_RET_020_RCN_0());
+ execute(TC_CSE_DMR_RET_020_RCN_2());
+ execute(TC_CSE_DMR_RET_020_RCN_3());
+ execute(TC_CSE_DMR_RET_021_CNT());
+ execute(TC_CSE_DMR_RET_021_GRP());
+ execute(TC_CSE_DMR_RET_021_ACP());
+ execute(TC_CSE_DMR_RET_021_SCH());
+ execute(TC_CSE_DMR_RET_021_PCH());
+ execute(TC_CSE_DMR_RET_021_SUB());
+ execute(TC_CSE_DMR_RET_022_CNT());
+ execute(TC_CSE_DMR_RET_022_GRP());
+ execute(TC_CSE_DMR_RET_022_ACP());
+ execute(TC_CSE_DMR_RET_022_SCH());
+ execute(TC_CSE_DMR_RET_022_PCH());
+ execute(TC_CSE_DMR_RET_022_SUB());
+ execute(TC_CSE_DMR_RET_023_CNT());
+ execute(TC_CSE_DMR_RET_023_GRP());
+ execute(TC_CSE_DMR_RET_023_ACP());
+ execute(TC_CSE_DMR_RET_023_SCH());
+ execute(TC_CSE_DMR_RET_023_PCH());
+ execute(TC_CSE_DMR_RET_023_SUB());
+ execute(TC_CSE_DMR_RET_024_CNT());
+ execute(TC_CSE_DMR_RET_024_GRP());
+ execute(TC_CSE_DMR_RET_024_ACP());
+ execute(TC_CSE_DMR_RET_024_SCH());
+ execute(TC_CSE_DMR_RET_024_PCH());
+ execute(TC_CSE_DMR_RET_024_SUB());
+ execute(TC_CSE_DMR_UPD_001_CNT_LBL());
+ execute(TC_CSE_DMR_UPD_001_GRP_LBL());
+ execute(TC_CSE_DMR_UPD_001_ACP_LBL());
+ execute(TC_CSE_DMR_UPD_001_SCH_LBL());
+ execute(TC_CSE_DMR_UPD_001_PCH_LBL());
+ execute(TC_CSE_DMR_UPD_001_SUB_LBL());
+ execute(TC_CSE_DMR_UPD_002_CNT_LBL());
+ execute(TC_CSE_DMR_UPD_002_GRP_LBL());
+ execute(TC_CSE_DMR_UPD_002_ACP_LBL());
+ execute(TC_CSE_DMR_UPD_002_SCH_LBL());
+ execute(TC_CSE_DMR_UPD_002_PCH_LBL());
+ execute(TC_CSE_DMR_UPD_002_SUB_LBL());
+ execute(TC_CSE_DMR_UPD_003_CNT_LBL());
+ execute(TC_CSE_DMR_UPD_003_GRP_LBL());
+ execute(TC_CSE_DMR_UPD_003_ACP_LBL());
+ execute(TC_CSE_DMR_UPD_003_SCH_LBL());
+ execute(TC_CSE_DMR_UPD_003_PCH_LBL());
+ execute(TC_CSE_DMR_UPD_003_SUB_LBL());
+ execute(TC_CSE_DMR_UPD_004_CNT_ET_MNI_LBL());
+ execute(TC_CSE_DMR_UPD_004_GRP_ET_GN_LBL());
+ execute(TC_CSE_DMR_UPD_004_ACP_PV_AT_LBL());
+ execute(TC_CSE_DMR_UPD_004_SCH_SE_AT_LBL());
+ execute(TC_CSE_DMR_UPD_004_PCH_LBL_ACP_LBL());
+ execute(TC_CSE_DMR_UPD_004_SUB_ET_LBL_EXC());
+ execute(TC_CSE_DMR_UPD_005_CNT_EXC());
+ execute(TC_CSE_DMR_UPD_005_GRP_EXC());
+ execute(TC_CSE_DMR_UPD_005_ACP_EXC());
+ execute(TC_CSE_DMR_UPD_005_SCH_EXC());
+ execute(TC_CSE_DMR_UPD_005_PCH_EXC());
+ execute(TC_CSE_DMR_UPD_005_SUB_MNI());
+ execute(TC_CSE_DMR_UPD_006_CNT_LBL());
+ execute(TC_CSE_DMR_UPD_006_GRP_LBL());
+ execute(TC_CSE_DMR_UPD_006_ACP_LBL());
+ execute(TC_CSE_DMR_UPD_006_SCH_LBL());
+ execute(TC_CSE_DMR_UPD_006_PCH_LBL());
+ execute(TC_CSE_DMR_UPD_006_SUB_LBL());
+ execute(TC_CSE_DMR_UPD_007_CNT_CT());
+ execute(TC_CSE_DMR_UPD_007_GRP_CT());
+ execute(TC_CSE_DMR_UPD_007_ACP_CT());
+ execute(TC_CSE_DMR_UPD_007_SCH_CT());
+ execute(TC_CSE_DMR_UPD_007_PCH_CT());
+ execute(TC_CSE_DMR_UPD_007_SUB_CT());
+ execute(TC_CSE_DMR_UPD_008_CNT_ET());
+ execute(TC_CSE_DMR_UPD_008_GRP_ET());
+ execute(TC_CSE_DMR_UPD_008_ACP_ET());
+ execute(TC_CSE_DMR_UPD_008_SCH_ET());
+ execute(TC_CSE_DMR_UPD_008_PCH_ET());
+ execute(TC_CSE_DMR_UPD_008_SUB_ET());
+ execute(TC_CSE_DMR_UPD_010());
+ execute(TC_CSE_DMR_DEL_001_CNT());
+ execute(TC_CSE_DMR_DEL_001_GRP());
+ execute(TC_CSE_DMR_DEL_001_ACP());
+ execute(TC_CSE_DMR_DEL_001_SCH());
+ execute(TC_CSE_DMR_DEL_001_PCH());
+ execute(TC_CSE_DMR_DEL_001_SUB());
+ execute(TC_CSE_DMR_DEL_001_CIN());
+ execute(TC_CSE_DMR_DEL_002_CNT());
+ execute(TC_CSE_DMR_DEL_002_GRP());
+ execute(TC_CSE_DMR_DEL_002_ACP());
+ execute(TC_CSE_DMR_DEL_002_SCH());
+ execute(TC_CSE_DMR_DEL_002_PCH());
+ execute(TC_CSE_DMR_DEL_002_SUB());
+ execute(TC_CSE_DMR_DEL_003());
+ execute(TC_CSE_DMR_DEL_004_CNT());
+ execute(TC_CSE_DMR_DEL_004_GRP());
+ execute(TC_CSE_DMR_DEL_004_ACP());
+ execute(TC_CSE_DMR_DEL_004_SCH());
+ execute(TC_CSE_DMR_DEL_004_PCH());
+ execute(TC_CSE_DMR_DEL_004_SUB());
+ execute(TC_CSE_DMR_DEL_005());
+ execute(TC_CSE_DMR_DEL_007());
+ execute(TC_CSE_DMR_DEL_008());
+ execute(TC_CSE_DMR_DEL_009());
+ execute(TC_CSE_DMR_DEL_010());
+
+ //CE_DMR_00002
+
+ //CE_SUB_00001
+
+ //CE_SUB_00004
+
+ //CE_SEC_00001
+
+ //CE_SEC_00002
+
+
+ }
+
+} // end of module OneM2M_TestControl_IN_profile
+